- The Chinese memory maker is developing a denser transistor design and hybrid bonding technology for its next-generation server memory
- The planned DDR5 registered DIMM would mark CXMT’s first direct push into a high-end segment dominated by Samsung, SK hynix and Micron
Chinese memory giant ChangXin Memory Technologies (CXMT) has made a key research breakthrough in its 4F² DRAM architecture and plans to launch a new generation of DDR5 registered dual in-line memory modules (RDIMMs) by the end of 2026, according to company president Cao Kanyu (曹堪宇).
The planned products will combine CXMT’s proprietary device technology, 4F² architecture and hybrid bonding, marking the company’s first public move into the DDR5 server-memory segment, Cao said at the 4th Integrated Chip and Chiplet Conference 2026 held October 9-10 in Shanghai.
RDIMMs are widely used in servers, where memory must support continuous operation, withstand electrical stress during hot-plugging and pass extensive compatibility tests across different generations of CPUs and motherboards.
A denser architecture
The 4F² design aims to increase memory density by reducing the area occupied by each memory cell. The industry’s mainstream DRAM architecture uses a 6F² cell design, while CXMT is developing a vertical surrounding-gate (VSG) transistor that wraps the gate around a vertically arranged channel.
The structure is designed to improve gate control and address leakage and short-channel effects that become more difficult to manage as transistors shrink. Its vertical layout also allows more memory cells to fit into a given area.
Cao said CXMT began researching 4F² architecture and building its patent portfolio when the company was founded. It has disclosed more than 300 patent families and published mainland China’s first paper on the architecture in 2021, he said.
Hybrid bonding for integration
CXMT is also working to separate DRAM and CMOS manufacturing processes and connect them through wafer-level hybrid bonding, which creates dense electrical connections between wafers.
The company began developing the technology independently in 2019. It has since built a disclosed patent portfolio that ranks among the world’s top 10, published a paper at the 2025 IEEE International Electron Devices Meeting, and completed experimental wafer-level bonding of DRAM and CMOS on a 12-inch platform.
CXMT’s decision to target server memory with its first 4F² products reflects the segment’s high technical requirements and attractive economics.
Server RDIMMs must meet demanding reliability and compatibility standards, making commercial deployment a more complex undertaking than producing memory for consumer devices.
The move comes as AI infrastructure drives demand for DRAM. CXMT’s share of global DRAM revenue rose to 10% in the second quarter, while the combined share of Samsung Electronics, SK hynix and Micron fell from 94% to 87%, according to Omdia.
If CXMT can bring its new architecture into production and meet server customers’ reliability requirements, it would move beyond competing mainly on domestic supply and price toward a more direct challenge to the leading global memory makers.
Header image credit: CXMT
